Improved Analysis of Early Packet Discard

In a previous paper one of the authors gave a worst case analysis for the Early Packet Discard technique for maintaining packet integrity during overload in ATM switches This analysis showed that to ensure goodput during overload under worst case conditions requires a bu er with enough storage for one maximum length packet from every active virtual circuit This paper re nes that analysis using assumptions that are closer to what we expect to see in practice Our principal result is that goodput can be achieved with substantially smaller bu ers although the required bu er space can be signi cant when the link speed is substantially higher than the rate of the individual virtual circuits These results are validated by comparison with simulation We also give a simple analysis to determine the amount of bu ering needed to bound the probability of bu er over ow and under ow